C8051F380/1/2/3/4/5/6/7/C
Table 22.3. Sources for Hardware Changes to SMBnCN
Bit
Set by Hardware When:
Cleared by Hardware When:
MASTERn
TXMODEn
?
?
?
A START is generated.
START is generated.
SMBnDAT is written before the start of an
SMBus frame.
?
?
?
?
?
A STOP is generated.
Arbitration is lost.
A START is detected.
Arbitration is lost.
SMBnDAT is not written before the
start of an SMBus frame.
STAn
?
?
A START followed by an address byte is
received.
A STOP is detected while addressed as a
?
?
Must be cleared by software.
A pending STOP is generated.
STOn
?
slave.
Arbitration is lost due to a detected STOP.
ACKRQn
?
A byte has been received and an ACK
response value is needed (only when
?
After each ACK cycle.
hardware ACK is not enabled).
?
A repeated START is detected as a
?
Each time SIn is cleared.
MASTER when STAn is low (unwanted
repeated START).
ARBLOSTn
?
?
SCLn is sensed low while attempting to
generate a STOP or repeated START
condition.
SDAn is sensed low while transmitting a 1
(excluding ACK bits).
ACKn
?
?
The incoming ACK value is low
(ACKNOWLEDGE).
A START has been generated.
?
?
The incoming ACK value is high
(NOT ACKNOWLEDGE).
Must be cleared by software.
?
?
Lost arbitration.
A byte has been transmitted and an
SIn
?
?
?
ACK/NACK received.
A byte has been received.
A START or repeated START followed by a
slave address + R/W has been received.
A STOP has been received.
22.4.4. Hardware Slave Address Recognition
The SMBus hardware has the capability to automatically recognize incoming slave addresses and send an
ACK without software intervention. Automatic slave address recognition is enabled by setting the EHACK
bit in register SMB0ADM to 1. This will enable both automatic slave address recognition and automatic
hardware ACK generation for received bytes (as a master or slave). More detail on automatic hardware
ACK generation can be found in Section 22.4.3.2.
The registers used to define which address(es) are recognized by the hardware are the SMBus Slave
Address register and the SMBus Slave Address Mask register. A single address or range of addresses
(including the General Call Address 0x00) can be specified using these two registers. The most-significant
seven bits of the two registers are used to define which addresses will be ACKed. A 1 in bit positions of the
slave address mask SLVM[6:0] enable a comparison between the received slave address and the hard-
ware’s slave address SLV[6:0] for those bits. A 0 in a bit of the slave address mask means that bit will be
treated as a “don’t care” for comparison purposes. In this case, either a 1 or a 0 value are acceptable on
Rev. 1.4
217
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